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Publication Details for Inproceedings "Enabling Parametric Feasibility Analysis in Real-time Calculus Driven Performance Evaluation"

 

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Authors: Alena Simalatsar, Yusi Ramadian, Kai Lampka, Simon Perathoner, Roberto Passerone, Lothar Thiele
Group: Computer Engineering
Type: Inproceedings
Title: Enabling Parametric Feasibility Analysis in Real-time Calculus Driven Performance Evaluation
Year: 2011
Month: October
Pub-Key: SRPLPT11
Book Titel: Proceedings of the 2011 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2011
Pages: 155-164
Keywords: Tool integration, System-level Design, Feasibility areas, Worst-case Analysis
Publisher: ACM
Abstract: This paper advocates a rigorously formal and compositional style for obtaining key performance and/or interface metrics of systems with real-time constraints. We propose a hierarchical approach that couples the independent and different by nature frameworks of Modular Performance Analysis with Real-time Calculus (MPA-RTC) and Parametric Feasibility Analysis (PFA). Recent work on Real-time Calculus (RTC) has established an embedding of state-based component models into RTC-driven performance analysis for dealing with more expressive component models. However, with the obtained analysis infrastructure it is possible to analyze components only for a fixed set of parameters, e.g. fixed CPU speeds, fixed buffer sizes etc., so that a big space of parameters remains unstudied. In this paper, we overcome this limitation by integrating the method of parametric feasibility analysis in an RTC-based modeling environment. Using the PFA tool-flow, we are able to find regions for component parameters that maintain feasibility and worst-case properties. As a result, the proposed analysis infrastructure produces a broader range of valid design candidates, and allows the designer to reason about the system robustness.
Remarks: Part of ESWeek 2011 Seventh Embedded Systems Week
Location: Taipei, Taiwan
Resources: [BibTeX] [Paper as PDF]

 

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