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| Authors: | Matthias Gries |
| Group: | Computer Engineering |
| Type: | Techreport |
| Title: | A Survey of Synchronous RAM Architectures |
| Year: | 1999 |
| Month: | April |
| Pub-Key: | Gri99 |
| Rep Nbr: | 71 |
| Institution: | Computer Engineering and Networks Lab (TIK), Swiss Federal Institute of Technology (ETH) Zurich |
| Abstract: | The functionality of volatile random access memories (RAMs) in personal computers, embedded systems, networking devices, and many other products is based on an access scheme which was
designed over thirty years ago. Since then a variety of different realizations has evolved. Due to the fact that VLSI designs for memory chips have always been optimized for area and not for
access speed, RAM chips have become more and more the performance bottleneck of complex computing systems. This survey gives an overview of current memory chip architectures. The basic functionality of memories is explained and the advantages and drawbacks of each RAM type are discussed. By providing a better understanding of the limits of current RAM designs, this report supports the decision for a particular RAM in an individual application. |
| Remarks: | TIK-Report No. 71, April 1999 |
| Resources: | [BibTeX] [Paper as PDF] |
