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2016 |
| Georgia Giannopoulou, Peter Poplavko, Dario Socci , Pengcheng Huang, Nikolay Stoimenov, Paraskevas Bourgos, Lothar Thiele, Marius Bozga, Saddek Bensalem, Sylvain Girbal,
Madeleine Faugere, Romain Soulat and Benoît Dupont de Dinechin : DOL-BIP-Critical: A Tool Chain for Rigorous Design and Implementation of Mixed-Criticality Multi-Core Systems Zurich, April 2016. Techreport [Details] [BibTeX] [External Link] |
2014 |
| Lars Schor: Programming Framework for Reliable and Efficient Embedded Many-Core Systems Gloriastrasse 35, 8092 Zurich, Switzerland, October 2014. PhD Thesis [Details] [BibTeX] [Paper as PDF] |
| Lars Schor, Iuliana Bacivarov, Hoeseok Yang and Lothar Thiele : AdaPNet: Adapting Process Networks in Response to Resource Variations Proc. International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), New Delhi, India, p. 8.1:1-8.1:10, October 2014. Inproceedings [Details] [BibTeX] [External Link] [Paper as PDF] |
| Lars Schor, Iuliana Bacivarov, Luis Gabriel Murillo, Pier Stanislao Paolucci, Frederic Rousseau, Ashraf El Antably, Robert Buecs, Nicolas Fournel, Rainer Leupers, Devendra Rai,
Lothar Thiele, Laura Tosoratto, Piero Vicini and Jan Weinstock: EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications onto Many-Tile Systems Proc. IEEE International Symposium on Parallel and Distributed Processing with Applications Article (ISPA), Milan, Italy, p. 182-189, August 2014. Inproceedings [Details] [BibTeX] [External Link] [Paper as PDF] |
| Lars Schor, Hoeseok Yang, Iuliana Bacivarov and Lothar Thiele: AdaPNet: Adapting the Structure of Process Networks in Response to Resource Variations at Run-Time (Poster) DAC Work-in-Progress Session (WIP), San Francisco, CA, USA, June 2014. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Georgia Giannopoulou, Nikolay Stoimenov, Pengcheng Huang and Lothar Thiele: Mapping Mixed-Criticality Applications on Multi-Core Architectures Design, Automation & Test in Europe Conference & Exhibition (DATE), Hot-Topic Session on Predictable Multicore Computing, Dresden, Germany, p. 1-6, March 2014. Inproceedings [Details] [BibTeX] [External Link] [Paper as PDF] |
| Pier Paolucci, Iuliana Bacivarov, Devendra Rai, Lars Schor, Lothar Thiele, Hoeseok Yang, Elena Pastorelli, Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Francesca Lo
Cicero, Alessandro Lonardo, Francesco Simula, Laura Tosoratto and Pier Vicini: EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes Gloriastrasse 35arxiv, February 2014. Misc [Details] [BibTeX] [External Link] |
2013 |
| Lars Schor, Andreas Tretter, Tobias Scherer and Lothar Thiele: Exploiting the Parallelism of Heterogeneous Systems using Dataflow Graphs on Top of OpenCL Proc. IEEE Symposium on Embedded Systems for Real-time Multimedia (ESTIMedia), Montreal, Canada, p. 41-50, October 2013. Inproceedings [Details] [BibTeX] [External Link] [Paper as PDF] |
| Georgia Giannopoulou, Nikolay Stoimenov, Pengcheng Huang and Lothar Thiele: Scheduling of Mixed-Criticality Applications on Resource-Sharing Multicore Systems International Conference on Embedded Software (EMSOFT), Montreal, p. 17:1-17:15, October 2013. Inproceedings [Details] [BibTeX] [External Link] [Paper as PDF] |
| Lothar Thiele, Lars Schor, Iuliana Bacivarov and Hoeseok Yang: Predictability for Timing and Temperature in Multiprocessor System-on-Chip Platforms ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia12, LCTES11, rigorous embedded systems design, and multiprocessor Volume 12, March 2013. Article [Details] [BibTeX] [External Link] [Paper as PDF] |
2012 |
| Shin-Haeng Kang, Hoeseok Yang, Lars Schor, Iuliana Bacivarov, Soonhoi Ha and Lothar Thiele: Multi-Objective Mapping Optimization via Problem Decomposition for Many-Core Systems Proc. IEEE Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia), Tampere, Finland, p. 28-37, October 2012. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Lars Schor, Iuliana Bacivarov, Devendra Rai, Hoeseok Yang, Shin-haeng Kang and Lothar Thiele: Scenario-Based Design Flow for Mapping Streaming Applications onto On-Chip Many-Core Systems Proc. International Conference on Compilers Architecture and Synthesis for Embedded Systems (CASES), Tampere, Finland, p. 71-80, October 2012. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Iuliana Bacivarov, Devendra Rai, Lars Schor, Lothar Thiele and Hoeseok Yang: Poster: DAL: Programming Efficient and Fault-Tolerant Applications for Many-Core Systems HiPEAC 2012: 7th International Conference on High-Performance and Embedded Architectures and Compilers, Paris, France, January 2012. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2011 |
| Lothar Thiele, Lars Schor, Hoeseok Yang and Iuliana Bacivarov: Thermal-Aware System Analysis and Software Synthesis for Embedded Multi-Processors Proc. Design Automation Conference (DAC), San Diego, California, USA, p. 268 - 273 , June 2011. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Bernhard Buchli, Mustafa Yuecel, Roman Lim, Tonio Gsell and Jan Beutel: Demo Abstract: Feature-Rich Experimentation for WSN Design Space Exploration Proceedings of the 10th International Conference on Information Processing in Sensor Networks (IPSN 2011), Chicago, IL, USA, p. 115-116, April 2011. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Andreas Schranzhofer: Efficiency and predictability in resource sharing multicore systems ETH Zurich, Diss ETH No.19556, March 2011. PhD Thesis [Details] [BibTeX] [Paper as PDF] |
2010 |
| Rainer Leupers and Lothar Thiele: Cool MPSoC Programming Design Automation and Test Conference (DATE) 2010, p. 1488-1493, March 2010. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2009 |
| Kai Huang, Iuliana Bacivarov, Jun Liu and Wolfgang Haid: A Modular Fast Simulation Framework for Stream-Oriented MPSoC IEEE Symposium on Industrial Embedded Systems (SIES), Ecole Polytechnique Fédérale de Lausanne, Switzerland, p. 74-81, July 2009. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Jian-Jia Chen, Andreas Schranzhofer and Lothar Thiele: Energy Minimization for Periodic Real-Time Tasks on Heterogeneous Processing Units 2009 IEEE International Symposium on Parallel & Distributed Processing, International Parallel and Distributed Processing Symposium (IPDPS), Rome Italy, p. 1-12, May 2009. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2007 |
| Thomas Sporer, Andreas Franck, Iuliana Bacivarov, Michael Beckinger, Wolfgang Haid, Kai Huang, Lothar Thiele, Pier Paolucci, Piergiovanni Bazzana, Piero Vicini, Jianjiang Ceng,
Stefan Kraemer and Rainer Leupers: SHAPES - a Scalable Parallel HW/SW Architecture Applied to Wave Field Synthesis Proc. 32nd Intl Audio Engineering Society (AES) Conference, Hillerod, Denmark, p. 175-187, September 2007. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid and Kai Huang: Mapping Applications to Tiled Multiprocessor Embedded Systems Proc. 7th Intl Conference on Application of Concurrency to System Design (ACSD 2007), Bratislava, Slovak Republic, p. 29-40, July 2007. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2006 |
| Simon Künzli: Efficient Design Space Exploration for Embedded Systems April 2006. PhD Thesis [Details] [BibTeX] [Paper as PDF] |
| Pier Stanislao Paolucci and Lothar Thiele: SHAPES: a tiled software hardware platform for embedded systems Proceedings of the 4th international conference on Hardware/software codesign and system synthesis CODES/ISSS, Seoul, Korea, p. 167 - 172 2006. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Simon Künzli, Lothar Thiele and Eckart Zitzler: Multi-criteria Decision Making in Embedded System Design System-on-Chip: Next Generation Electronics, p. 3-28 2006. Incollection [Details] [BibTeX] [Paper as PDF] |
2005 |
| Simon Künzli, Lothar Thiele and Eckart Zitzler: Modular Design Space Exploration Framework for Embedded Systems IEE Proceedings Computers & Digital Techniques Volume 152, Issue 2, p. 183-192, March 2005. Article [Details] [BibTeX] [Paper as PDF] |
2004 |
| Simon Künzli, Stefan Bleuler, Lothar Thiele and Eckart Zitzler: A Computer Engineering Benchmark Application for Multiobjective Optimizers Applications of Multi-Objective Evolutionary Algorithms, p. 269-294, December 2004. Incollection [Details] [BibTeX] |
| Nuria Pazos, Paolo Ienne, Yusuf Leblebici and Alexandre Maxiaguine: Parallel Modelling Paradigm in Multimedia Applications: Mapping and Scheduling onto a Multi-Processor System-on-Chip Platform The Global Signal Processing Conference (GSPx), Santa Clara, CA, September 2004. Inproceedings [Details] [BibTeX] |
| Urs Anliker, Jan Beutel, Matthias Dyer, Rolf Enzler, Paul Lukowicz, Lothar Thiele and Gerhard Tröster: A Systematic Approach to the Design of Distributed Wearable Systems IEEE Transactions on Computers Volume 53, Issue 8, p. 1017-1033, August 2004. Article [Details] [BibTeX] [Paper as PDF] |
| Neal K. Bambha, Shuvra Bhattacharyya, Juergen Teich and Eckart Zitzler: Systematic Integration of Parameterized Local Search into Evolutionary Algorithms IEEE Transactions on Evolutionary Computation Pscataway, NY, Volume 8, Issue 2, p. 137-155, April 2004. Article [Details] [BibTeX] [Paper as PDF] |
| Alexandre Maxiaguine, Yongxin Zhu, Samarjit Chakraborty and Weng-Fai Wong: Tuning SoC platforms for multimedia processing: identifying limits and tradeoffs CODES+ISSS 2004: Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, Stockholm, Sweden, p. 128-133 2004. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2003 |
| Philipp Blum and Lothar Thiele: Precise and Low-Jitter Wireless Time Synchronization December 2003. Techreport [Details] [BibTeX] [Paper as PDF] |
2002 |
| Michael Eisenring: Communication Channel Synthesis for Heterogeneous Embedded Systems October 2002. PhD Thesis [Details] [BibTeX] |
| Lothar Thiele, Samarjit Chakraborty, Matthias Gries and Simon Künzli: A Framework for Evaluating Design Tradeoffs in Packet Processing Architectures 39th Design Automation Conference (DAC 2002), New Orleans LA, USA, p. 880-885, June 2002. Inproceedings [Details] [BibTeX] |
| Lothar Thiele, Samarjit Chakraborty, Matthias Gries and Simon Künzli: Design Space Exploration of Network Processor Architectures First Workshop on Network Processors at the 8th International Symposium on High-Performance Computer Architecture (HPCA8), Cambridge MA, USA, p. 30-41, February 2002. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Lothar Thiele, Samarjit Chakraborty, Matthias Gries and Simon Künzli: Design Space Exploration of Network Processor Architectures Network Processor Design: Issues and Practices, Volume 1, p. 55-89 2002. Incollection [Details] [BibTeX] |
2001 |
| Matthias Gries: Algorithm-Architecture Trade-offs in Network Processor Design July 2001. PhD Thesis [Details] [BibTeX] [Paper as PDF] |
| Nando Laumanns, Marco Laumanns and Dirk Neunzig: Multi-Objective Design Space Exploration of Road Trains with Evolutionary Algorithms Lecture Notes on Computer Science. Evolutionary Multi-criterion Optimization (EMO 2001), Berlin, Volume 1993, p. 612-623, March 2001. Inproceedings [Details] [BibTeX] [Paper as PDF] |
| Juergen Teich and Lothar Thiele: Exact Partitioning of Affine Dependence Algorithms Lecture Notes in Computer Science, Vol. 2268, SAMOS - Systems, Architecures, Modeling and Simulation, p. 131-151 2001. Incollection [Details] [BibTeX] [Paper as PDF] |
2000 |
| Michael Eisenring, Lothar Thiele and Eckart Zitzler: Handling Conflicting Criteria in Embedded System Design IEEE Design & Test of Computers Volume 17, Issue 2, p. 51-59, April 2000. Article [Details] [BibTeX] [Paper as PDF] |
