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2015 |
Andreas Tretter, Pratyush Kumar and Lothar Thiele: Interleaved Multi-Bank Scratchpad Memories: A Probabilistic Description of Access Conflicts Proceedings of the 52nd Annual Design Automation Conference (DAC), New York, NY, USA, p. 22:1-22:6, June 2015. Inproceedings [Details] [BibTeX] [External Link] [Paper as PDF] |
2014 |
Lars Schor: Programming Framework for Reliable and Efficient Embedded Many-Core Systems Gloriastrasse 35, 8092 Zurich, Switzerland, October 2014. PhD Thesis [Details] [BibTeX] [Paper as PDF] |
2013 |
Lothar Thiele, Lars Schor, Iuliana Bacivarov and Hoeseok Yang: Predictability for Timing and Temperature in Multiprocessor System-on-Chip Platforms ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia12, LCTES11, rigorous embedded systems design, and multiprocessor Volume 12, March 2013. Article [Details] [BibTeX] [External Link] [Paper as PDF] |
C. Fabre, I. Bacivarov, A. Basu, M. Ruggiero, D. Atienza, E. Flamand, JP. Krimm, J. Mottin, L. Schor, P. Kumar, H. Yang, D. Chokshi, L. Thiele, S. Bensalem, M. Bozga, L. Benini,
M. Sabry, Y. Leblebici, G. De Micheli and D. Melpignano: PRO3D, Programming for Future 3D Manycore Architectures: Project Interim Status Formal Methods for Components and Objects (FMCO) - Lecture Notes on Computer Science (LNCS), Berlin Heidelberg, Volume 7542, p. 277-293, January 2013. Incollection [Details] [BibTeX] [Paper as PDF] |
Lars Schor, Hoeseok Yang, Iuliana Bacivarov and Lothar Thiele: Thermal-Aware Task Assignment for Real-Time Applications on Multi-Core Systems Lecture Notes on Computer Science (LNCS). Proc. International Symposium on Formal Methods for Components and Objects (FMCO) 2011, Berlin Heidelberg, Volume 7542, p. 294–313, January 2013. Incollection [Details] [BibTeX] [Paper as PDF] |
2012 |
Shin-Haeng Kang, Hoeseok Yang, Lars Schor, Iuliana Bacivarov, Soonhoi Ha and Lothar Thiele: Multi-Objective Mapping Optimization via Problem Decomposition for Many-Core Systems Proc. IEEE Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia), Tampere, Finland, p. 28-37, October 2012. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Lars Schor, Iuliana Bacivarov, Devendra Rai, Hoeseok Yang, Shin-haeng Kang and Lothar Thiele: Scenario-Based Design Flow for Mapping Streaming Applications onto On-Chip Many-Core Systems Proc. International Conference on Compilers Architecture and Synthesis for Embedded Systems (CASES), Tampere, Finland, p. 71-80, October 2012. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Lars Schor, Iuliana Bacivarov, Hoeseok Yang and Lothar Thiele: Fast Worst-Case Peak Temperature Evaluation for Real-Time Applications on Multi-Core Systems Proc. IEEE Latin American Test Workshop (LATW), Quito, Ecuador, p. 1-6, April 2012. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Lars Schor, Iuliana Bacivarov, Hoeseok Yang and Lothar Thiele: Worst-Case Temperature Guarantees for Real-Time Applications on Multi-Core Systems Proc. IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), Beijing, China, p. 87-96, April 2012. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Kai Huang, Wolfgang Haid, Iuliana Bacivarov, Matthias Keller and Lothar Thiele: Embedding Formal Performance Analysis into the Design Cycle of MPSoCs for Real-time Streaming Applications ACM Transactions in Embedded Computing Systems (TECS) Volume 11, Issue 1, p. 8:1-8:23, March 2012. Article [Details] [BibTeX] [Paper as PDF] |
2011 |
Peter Marwedel, Juergen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu and Lin Huang: Mapping of Applications to MPSoCs Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS’11, Taipei, Taiwan, p. 109-118, October 2011. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Lars Schor, Hoeseok Yang, Iuliana Bacivarov and Lothar Thiele: Worst-Case Temperature Analysis for Different Resource Availabilities: A Case Study Lecture Notes on Computer Science. Proc. International Workshop on Power and Timing Modeling, Optimization, and Simulation (PATMOS) , Volume 6951, p. 288-297, September 2011. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Lothar Thiele, Lars Schor, Hoeseok Yang and Iuliana Bacivarov: Thermal-Aware System Analysis and Software Synthesis for Embedded Multi-Processors Proc. Design Automation Conference (DAC), San Diego, California, USA, p. 268 - 273 , June 2011. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Iuliana Bacivarov, Hoeseok Yang, Lars Schor, Devendra Rai, Sudhanshu Jha and Lothar Thiele: Distributed Application Layer: Towards Efficient and Reliable Programming of Many-Tile Architectures Poster DATE11 Friday Workshop, Grenoble, France, March 2011. Misc [Details] [BibTeX] |
Kai Huang, Luca Santinelli, Jian-Jia Chen, Lothar Thiele and Giorgio C. Buttazzo: Applying real-time interface and calculus for dynamic power management in hard real-time systems Real-Time Systems Volume 47, Issue 2, p. 163-193, March 2011. Article [Details] [BibTeX] [Paper as PDF] |
Devendra Rai, Hoeseok Yang, Iuliana Bacivarov, Jian-Jia Chen and Lothar Thiele: Worst-Case Temperature Analysis for Real-Time Systems Proceedings of Design, Automation and Test in Europe, DATE11, Grenoble, France, March 2011. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2010 |
Kai Huang, Luca Santinelli, Jian-Jia Chen, Lothar Thiele and Giorgio C. Buttazzo: Adaptive Power Management for Real-Time Event Streams the 15th IEEE Conf. on Asia and South Pacific Design Automation Conference (ASP-DAC), Taiwan, p. 7-12, January 2010. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2009 |
Wolfgang Haid, Kai Huang, Iuliana Bacivarov and Lothar Thiele: Multiprocessor SoC Software Design Flows IEEE Signal Processing Magazine Volume 26, Issue 6, p. 64-71, November 2009. Article [Details] [BibTeX] [Paper as PDF] |
Wolfgang Haid, Lars Schor, Kai Huang, Iuliana Bacivarov and Lothar Thiele: Efficient Execution of Kahn Process Networks on Multi-Processor Systems Using Protothreads and Windowed FIFOs Proc. IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia), Grenoble, France, p. 35-44, October 2009. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Wolfgang Haid, Matthias Keller, Kai Huang, Iuliana Bacivarov and Lothar Thiele: Generation and Calibration of Compositional Performance Analysis Models for Multi-Processor Systems Proc. Intl Conference on Systems, Architectures, Modeling and Simulation (SAMOS), Samos, Greece, p. 92-99, July 2009. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Kai Huang, Iuliana Bacivarov, Jun Liu and Wolfgang Haid: A Modular Fast Simulation Framework for Stream-Oriented MPSoC IEEE Symposium on Industrial Embedded Systems (SIES), Ecole Polytechnique Fédérale de Lausanne, Switzerland, p. 74-81, July 2009. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2008 |
Kai Huang, Iuliana Bacivarov, Fabian Hugelshofer and Lothar Thiele: Scalably distributed SystemC simulation for embedded applications International Symposium on Industrial Embedded Systems, p. 271 - 274 , June 2008. Inproceedings [Details] [BibTeX] [Paper as PDF] |
2007 |
Wolfgang Haid and Lothar Thiele: Complex Task Activation Schemes in System Level Performance Analysis Proc. 5th Intl Conf. on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), Salzburg, Austria, p. 173-178, October 2007. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Thomas Sporer, Andreas Franck, Iuliana Bacivarov, Michael Beckinger, Wolfgang Haid, Kai Huang, Lothar Thiele, Pier Paolucci, Piergiovanni Bazzana, Piero Vicini, Jianjiang Ceng,
Stefan Kraemer and Rainer Leupers: SHAPES - a Scalable Parallel HW/SW Architecture Applied to Wave Field Synthesis Proc. 32nd Intl Audio Engineering Society (AES) Conference, Hillerod, Denmark, p. 175-187, September 2007. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid and Kai Huang: Mapping Applications to Tiled Multiprocessor Embedded Systems Proc. 7th Intl Conference on Application of Concurrency to System Design (ACSD 2007), Bratislava, Slovak Republic, p. 29-40, July 2007. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Kai Huang, David Gruenert and Lothar Thiele: Windowed FIFOs for FPGA-based Multiprocessor Systems Montreal, Canada, p. 36-42, July 2007. Inproceedings [Details] [BibTeX] [Paper as PDF] |
Iuliana Bacivarov, Michael Beckinger, Wolfgang Haid, Kai Huang and Lothar Thiele: Distributed Operation Layer: Optimal Mapping of Parallel Applications onto Heterogeneous Multiprocessor Tile-Based Architectures DATE07 Workshop, Nice, France, April 2007. Misc [Details] [BibTeX] |